Communication
Contacts
Offering
Investors
Careers
Sesame
Embedded memories
Logic virtual components
Analog virtual components
Test structures
Virtual test & diagnostic
Hardware/Software Codesign
Hardware/Software Codesign
Layout verification
Quadrant of skills
SoC Integration
Custom Fabless Supplier
 
 

Search dolphin:

SMASH 5.10 Analog Power Analysis & Debug

 

To overcome SoC integration challenges for increased performance, higher density, and reduced power consumption, designers must employ hierarchical budget allocation and analysis techniques. Constraints must be assigned harmoniously to the components of the System for power, noise…
In order to maintain its lead in diagnostic know-how, not only does SMASH provide hierarchical extraction and tracing of power and noise, but it facilitates Virtual Test by enabling floating net detection during simulation to spot high impedance nets otherwise noticed too late during real test.

 

Key enhancements

  • High impedance (floating) net detection at operating point and during transient analysis
  • Hierarchical analog power and noise extraction and tracing
  • Acceleration of the interactive waveform display
  • Tracing of resistive and capacitive impedance of SPICE nets for all analyses
  • Integration of SPICE device models (lossy transmission lines, EKV3, PSP, Juncap2 diode…)
  • HSPICE compatibility improvements for full compliance with foundry model parameter files including scaling (SCALE parameter)
  • Enhanced API allowing users to create dedicated extensions and plug-ins for innovative processing
 smash 5.9

 

Description of the Enhancements

Along with identified HSPICE compatibility improvements required by our users for not having to fiddle with the foundry supplied fab model parameter sets, SMASH 5.10 delivers lossy transmission line models, the EKV3 transistor model for analog/RF IC design, and the recently standardized PSP transistor model along with its source/drain junction model for accurate description of all physical effects important for modern and future CMOS technologies.

Improving designers' productivity to a large extent entails accelerating displays (as for the waveforms presented above) but also enhancing the diagnostic capabilities both at operating point and during transient analysis with innovative circuit debugging techniques like high impedance (floating) net detection. This is an exclusive SMASHing contribution!

< SMASH Evolution over time

download SMASH