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Tutorial for Sesame standard cell library - One-Stem Try-and-Buy |
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Why an evaluation tutorial
Assessing the comparative performances of such a new concept as RCSL versus a CCSL in a reliable way is a tricky project as it deals with statistical issues… It is reminiscent of the RISC versus CISC issue whereby instruction-by-instruction comparison is useless. Indeed, depending on the benchmark, the results of evaluation can be very different. One library can be better than another on a certain benchmark and the contrary on another benchmark!
Performances depend on the benchmark selected: complexity, ratio of combinatorial versus sequential circuitry, clock domains, and above all on the diverse constraints and scripts to REOPTIMIZE logic synthesis and place and routing operations for a novel concept (RCSL): frequency, form factor, number of routing layers…
For avoiding the comparison traps and facilitate an objective assessment, we offer our "Try and Buy” tutorial.
About cell by cell evaluation:
Or why we think this method is not reliable to compare different libraries :
- not relevant for a comparison of libraries with different structures
- only assesses a few cells, which are not necessarily representative
- does not assess impact of frequency of use of cells, of synthesis algorithms, of wire-load models, of routing, and of multiple driving capability of the cells
Key Benefits
- Save time
less than 3 hours to get familiar with SESAME and to obtain the results from logic synthesis!
- Make a decision based on reliable results
compare various solutions on an equal basis (adequate parameters and conditions)
- Assess the performances of SESAME
silicon area, leakage, max frequency and power consumption
- Come to grips with SESAME
follow the guide and apply step by step the design process to some selected circuit
- Facilitate a first design with SESAME
check the flow compatibility of the SESAME deliverables with your design chain to avoid delays
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The Try and Buy tutorial guides the evaluator all along three steps:
1) Step 1: Charm
Template fitting: results of area, max frequency, leakage power and dynamic power in typical case on the FLIP 8051 template.
- Purpose of this 1st step: Dolphin provides the results to be obtained on the FLIP 8051. The possibility for the prospect to compare his results with the ones obtained by Dolphin ensures an efficient support in case of discrepancy. The prospect can perform a reliable comparison for the following steps as the calibration of the design tools has been checked.
- Deliverables: Charm tutorial, .lib file in 1 corner (typical case), application software for power consumption evaluation, synthesis script for Design Compiler, Dolphin’s results table on the 8051 for comparison purpose
2) Step 2: Design-In
Custom synthesis benchmark: Charm tutorial, synthesis results of area, max frequency, leakage power and dynamic power in worst case
- Aim of this step: The prospect can perform a comparison on his reference Benchmark.
- Deliverables: .lib file in 3 corners
3) Step 3: Integration
Template fitting and custom P&R benchmark: results of area, max frequency, leakage power and dynamic power after P&R, to be performed first on the FLIP 8051 (same purpose as for step 1) and then on the user's benchmark
- Deliverables: Integration tutorial, .lef files and .lib files in 3 corners, Dolphin’s results table on the 8051 for comparison purpose
Get access to more information, please fill in the following registration.
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