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Microcontroller Differentiators

 

Benefits for Power Consumption

 

Lower frequency yields lower power consumption

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Efficiency in power consumption when providing the same computing power:
FlipAPS32 can reduce drastically power consumption compared with any microcontroller with the same computing power, and could flag even more impressive power savings when combined with the celebrated low power library, SESAME.

 

 

The required processing power can be obtained at a lower frequency thanks to the FlipAPS32, when compared to 8/16-bit architecture, thus enabling to reduce the power consumption, not only for the core itself, but for the program and data memories.

 

Cost / Performance

Dhrystone Benchmark v2

Thanks to Flip80251 or FlipAPS32,
the size of the compiled code can be reduced
up to 45% when compared to the 80C51!!

Achievable Area Saving with Flip80251 or FlipAPS32 with SESAME uHD – TSMC 0.18um: (Program located in RAM)

Achievable Area Saving

3.85 mm2   →   2.37 mm2
0.017 DMIPS / MHz   →   0.296 DMIPS / MHz

Achievable Area Saving

2.37 mm2   →   2.25 mm2
0.296 DMIPS / MHz   →   0.710 DMIPS / MHz

When comparing the silicon area of FlipAPS32 + its program memory (located in RAM) versus the silicon area of Flip8051-Wind in the same configuration, area savings reach up to 40 %, thanks to the program memory.
Moreover, the computing power is increased by a factor 41!

 

Acceleration of your Application program By 3 to 9-times, and up to 300-times with the DSP instructions
Reduction of the SoC power consumption By 30%, 50%, 60% or more with the CPMU and the ECPMU
Reduction of the CPU Silicon Cost By customization of Processor and Controller area with configurable peripherals
Reliability and robustness for your SoC Thanks to the adaptativeness of the Virtual Testbench for each configuration
Protection against Accesses to Memories

SoC Anti Piracy with respect to any emulator interface

Reduction of your SoC development costs With optimized software tools for code development, low-cost patented ICE solutions for application program debugging and codesign on cosimulator SUCCESS.
Roadmap for Future SoC generation With on-going innovations improving all the above for a lasting partnership